This new guide covers the key design problems of modeling, architectural tradeoffs, functional verification, timing analysis, test generation, fault simulation, design for testability, logic synthesis, and postsynthesis verification. The author's focus is on developing, verifying, and synthesizing designs of digital circuits rather than on the Verilog language.
Read More
This new guide covers the key design problems of modeling, architectural tradeoffs, functional verification, timing analysis, test generation, fault simulation, design for testability, logic synthesis, and postsynthesis verification. The author's focus is on developing, verifying, and synthesizing designs of digital circuits rather than on the Verilog language.
Read Less
Add this copy of Advanced Digital Design with the Verilog(tm) Hdl to cart. $111.53, new condition, Sold by Just one more Chapter rated 3.0 out of 5 stars, ships from Miramar, FL, UNITED STATES, published 2002 by Prentice Hall.
