This book demonstrates the design of high performance 4-bit ALU at 200nm technology, 3.3V supply. For this ALU design, we have used two different technologies (Complementary Static Logic based CMOS technology and BiCMOS technology) and compared these two w.r.t. speed, power dissipation and power-delay product. The comparison of CMOS to BiCMOS often seen in the literature shows the delay of single stage circuits driving a capacitive load, with the BiCMOS circuit exhibiting a bold advantage. TANNER EDA Tool is used for ...
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This book demonstrates the design of high performance 4-bit ALU at 200nm technology, 3.3V supply. For this ALU design, we have used two different technologies (Complementary Static Logic based CMOS technology and BiCMOS technology) and compared these two w.r.t. speed, power dissipation and power-delay product. The comparison of CMOS to BiCMOS often seen in the literature shows the delay of single stage circuits driving a capacitive load, with the BiCMOS circuit exhibiting a bold advantage. TANNER EDA Tool is used for schematic simulation. The simulation technology used is MOSIS 200nm.
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