This book presents two techniques to reduce leakage power in digital VLSI ICs. The first reduces leakage through the selective use of high threshold voltage sleep transistors, while the second by applying the optimal Reverse Body Bias voltage.
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This book presents two techniques to reduce leakage power in digital VLSI ICs. The first reduces leakage through the selective use of high threshold voltage sleep transistors, while the second by applying the optimal Reverse Body Bias voltage.
Read Less
Add this copy of Minimizing and Exploiting Leakage in Vlsi Design to cart. $203.27, good condition, Sold by Bonita rated 4.0 out of 5 stars, ships from Santa Clarita, CA, UNITED STATES, published 2009 by Springer.
