Written by a stellar team of field experts, this title is a comprehensive guide to new VLSI Testing and Design-for-Testability techniques that allow VSLI designers, DFT practitioners, and students to master quickly System-on-Chip Test architectures, memory, and analog/mixed-signal designs.
Read More
Written by a stellar team of field experts, this title is a comprehensive guide to new VLSI Testing and Design-for-Testability techniques that allow VSLI designers, DFT practitioners, and students to master quickly System-on-Chip Test architectures, memory, and analog/mixed-signal designs.
Read Less
Add this copy of System-on-Chip Test Architectures: Nanometer Design for to cart. $105.64, good condition, Sold by Bonita rated 4.0 out of 5 stars, ships from Santa Clarita, CA, UNITED STATES, published 2007 by Morgan Kaufmann.
Add this copy of System-on-Chip Test Architectures to cart. $115.56, new condition, Sold by Media Smart rated 4.0 out of 5 stars, ships from Hawthorne, CA, UNITED STATES, published 2007 by Elsevier.
Add this copy of System-on-Chip Test Architectures: Nanometer Design for to cart. $131.28, new condition, Sold by Just one more Chapter rated 3.0 out of 5 stars, ships from Miramar, FL, UNITED STATES, published 2007 by Morgan Kaufmann.
Add this copy of System-on-Chip Test Architectures: Nanometer Design for to cart. $143.11, new condition, Sold by Bonita rated 4.0 out of 5 stars, ships from Santa Clarita, CA, UNITED STATES, published 2007 by Morgan Kaufmann.
