Verilog -- 2001: A Guide to...
Stuart Sutherland
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Boolean Reasoning: The Logic...
Frank Markham Brown
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System-On-Chip for Real-Time...
Wael Badawy (Editor),
Graham A Julien (Editor)
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Advanced ASIC Chip Synthesis:...
Himanshu Bhatnagar
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Symbolic Model Checking
Kenneth L McMillan
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Model Generation in...
Jean-Michel Bergé (Editor),
Oz Levia (Editor)
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Computer-Aided Design...
José Monteiro,
Srinivas Devadas
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Logic Synthesis for Low Power...
Sasan Iman,
Massoud Pedram
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Low-Energy FPGAs --...
Varghese George,
Jan M Rabaey
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Sequential Logic Synthesis
Pranav Ashar,
S Devadas
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Logic Synthesis and...
Tsutomu Sasao (Editor)
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The Best of Iccad: 20 Years...
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Timed Boolean Functions: A...
William K C Lam,
Robert K Brayton
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Logic Synthesis for Field...
Rajeev Murgai,
Robert K Brayton
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The Dynamics of Digital...
Masakazu Shoji
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Low Power Digital CMOS Design
Anantha P Chandrakasan,
Robert W Brodersen
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Cross-Talk Noise Immune VLSI...
Robert K Brayton,
Alberto L Sangiovanni-Vincentelli
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Practical Low Power Digital...
Gary K Yeap
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Digital Timing Macromodeling...
Jeong-Taek Kong,
David V Overhauser
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High-Level VLSI Synthesis
Raul Camposano (Editor),
Wayne Wolf, Ph.D. (Editor)
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High-Performance Digital VLSI...
Richard X Gu,
Khaled M Sharaf
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A Survey of High-Level...
Robert A Walker (Editor),
Raul Camposano (Editor)
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Design Automation for Timing...
S Sapatnekar,
Sung-Mo (Steve) Kang
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Sequential Logic Testing and...
Abhijit Ghosh,
Srinivas Devadas
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