Timing
Sachin Sapatnekar
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Cellular Neural Networks and...
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Analog Design for CMOS VLSI...
Franco Maloberti
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Verification by Error...
Katarzyna Radecka,
Zeljko Zilic
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Power-Constrained Testing of...
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Bashir M. Al-Hashimi
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System on Chip Design...
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System Specification & Design...
Eugenio Villar (Editor),
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Algorithms, Complexity...
Peter M. Kuhn
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On Optimal Interconnections...
Andrew B. Kahng,
Gabriel Robins
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CMOS Fractional-N...
Bram De Muer,
Michiel Steyaert
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CMOS VLSI Engineering:...
James B. Kuo,
Ker-Wei Su
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Embedded Memories for Nano...
Kevin Zhang (Editor)
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Yield Simulation for...
D.M. Walker
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Vlsi-Soc: From Systems to...
Manfred Glesner (Editor),
Ricardo Reis (Editor)
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Assertion-Based Design
Harry D. Foster,
Adam C. Krolnik
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Routing Congestion in VLSI...
Prashant Saxena,
Rupesh S Shelar
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VLSI Memory Chip Design
Kiyoo Itoh
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Modern Circuit Placement:...
Gi-Joon Nam (Editor),
Jingsheng Jason Cong (Editor)
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Fully-Depleted Soi CMOS...
Takayasu Sakurai,
Akira Matsuzawa
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VLSI High-Speed I/O Circuits
Hongjiang Song
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Higher Order Logic and...
T. F. Melham
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Digital VLSI Chip Design with...
Neil Weste,
David Harris
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Computer Aids For VLSI Design
Steven M Rubin
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Basic VLSI Design
Douglas A. Pucknell,
Kamran Eshraghian
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